I have seen several posts on the forum about this topic but no real conclusions.
We routinely have circuits go over 100% utilization. This can be a single T1 or a full T3. For instance right now I have a T3 showing 83% in one direction and 90% in the other. That is almost 200%. Obviously this is not possible so what might we need to do to correct such a thing? All of our bandwidth statement are up to date and correct.
Thank you
